Georgia Tech Analog, Power, & Energy ICs Lab

Prof. G.A. Rincón-Mora, Ph.D., IEEE Fellow and IET Fellow

General Analog ICs, Why? Research Newsletter 1-pg Rsrch Overview Research Overview Circuitos Análogos Publications Presentations IEEE Writing Style

Technical Resources SoA in Switched-L DC-DC Bode Plot/Root Locus Open Feedback Loop Hys Comp's AC Resp Tech Comp in CCM Tech Comp in DCM Sample PCB PCB Layout Design/Plan PCB PCB Soldering PCB Fab MOSIS Fab Info MOSIS IC Fab Measuring fA's

Lab. Resources Research Pictures Lab Pictures Office Pictures Plotting Lab Rules Measure Freq. Resp. " Excel Template " EXE File Misc. IC #s Required Training: Lab Safety 101 Laser Safety Right-to-Know Law

Sponsors

Department of Energy (DoE), Office of the Secretary of Defense (OSD), Navy Undersea Warfare Center (NUWC), Analog Devices, Honeywell, Intersil, Linear Technology (LTC), National Semiconductor (NSC), Texas Instruments (TI), Southeastern Center for Electrical Engineering Education (SCEEE), Georgia Tech Analog Consortium (GTAC), Georgia Electronic Design Center (GEDC), and Yamacraw

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